About the Role
Develop/Improve state of the designs [RTL] and testbenches Collaborate closely with other verifiers, designers, and architects. Build competence in the technical domain. Bachelor's or Master's degree in electrical or computer engineering Knowledge of ASIC IP design and/or verification [0 to 5 years of experience] Team-oriented, prioritizing team success High attention to detail and commitment to quality. Strong focus on meeting project deadlines and deliverables. Strong communication skills.
Tech Stack
ASIC designASIC verificationRTL