/HDL Technical Lead (FPGA)

HDL Technical Lead (FPGA)

Boulder, CORemoteusvia direct
// Job Type
Full Time
// Salary
USD 150,000 - 250,000/year
// Salary Range
150,000–250,000 USD / year
// Posted
3 months ago
// Work Mode
hybrid

About the Role

<div> <h2>HDL Technical Lead (FPGA)</h2> <p><strong>Location:</strong> Boulder, CO<br /><strong>Salary Range:</strong> $150,000 – $250,000</p> <h3>Overview</h3> <p>An expanding RF technology organization is in need of an adept <strong>HDL Technical Lead</strong> to provide architectural guidance and technical supervision for various FPGA development initiatives.</p> <p>This role is tailored for a seasoned engineer who excels in <strong>leading through technical acumen rather than formal managerial authority</strong>. The position entails system-level decision-making, coordination across programs, and hands-on engineering work, with about <strong>half of the time dedicated to design, tooling, and solving intricate problems</strong>.</p> <p>You will assist multiple ongoing programs, aiding teams in establishing architecture alignment, enhancing design reusability, and making informed technical decisions while ensuring consistent project execution.</p> <hr> <h2>Key Responsibilities</h2> <ul> <li> <p>Oversight of FPGA/HDL development across <strong>3–4 simultaneous programs</strong></p> </li> <li> <p>Defining and guiding <strong>system-level architecture</strong> in line with program requirements and long-term platform strategy</p> </li> <li> <p>Promotion of reusing IP, architecture, and development tools to enhance efficiency and consistency</p> </li> <li> <p>Leading design reviews, technical planning, and cross-team coordination to uphold quality and deadlines</p> </li> <li> <p>Direct input in:</p> <ul> <li> <p>Specialized HDL development</p> </li> <li> <p>Tooling and automation</p> </li> <li> <p>Complex debugging and performance optimization</p> </li> </ul> </li> <li> <p>Collaboration with <strong>RF, hardware, and embedded software teams</strong> for successful system integration</p> </li> <li> <p>Providing technical mentorship, design feedback, and best-practice advice to engineers (no direct reports)</p> </li> <li> <p>Guiding verification strategy, simulation approach, documentation standards, and integration readiness</p> </li> <li> <p>Assessing timing closure, interface design, and architectural tradeoffs across various systems</p> </li> <li> <p>Assisting with hardware bring-up and integration in <strong>Linux-based settings</strong></p> </li> </ul> <hr> <h2>Required Qualifications</h2> <ul> <li> <p>U.S. Citizenship and eligibility for security clearance</p> </li> <li> <p>Bachelor’s degree in Electrical Engineering, Computer Engineering, or related discipline</p> </li> <li> <p>Professional experience in FPGA designs using <strong>Verilog, VHDL, or equivalent languages</strong></p> </li> <li> <p>Experience in providing <strong>technical direction or owning architecture</strong></p> </li> <li> <p>Thorough understanding of digital system design, timing analysis, and hardware interfaces</p> </li> <li> <p>Experience with high-speed and control interfaces like:</p> <ul> <li> <p>PCIe, SPI, I²C</p> </li> <li> <p>AXI, Aurora, JESD</p> </li> </ul> </li> <li> <p>Understanding of digital logic integration within RF or mixed-signal systems</p> </li> <li> <p>Ability to work across programs and think at the system level</p> </li> </ul> <hr> <h2>Preferred Experience</h2> <ul> <li> <p>Master’s degree in a related field</p> </li> <li> <p>Python, C/C++, or scripting for automation and test purposes</p> </li> <li> <p>Experience with Linux development (user space, drivers, Yocto, or PetaLinux)</p> </li> <li> <p>Utilization of simulation and verification tools (Vivado, ModelSim, etc.)</p> </li> <li> <p>Hands-on exposure to hardware tasks like board bring-up, lab debug, or schematic review</p> </li> <li> <p>Experience with HDL modeling or generation tools</p> </li> <li> <p>Background in supporting multiple products or programs concurrently</p> </li> </ul> <hr> <h2>Work Environment &amp; Schedule</h2> <ul> <li> <p>Full-time role (40+ hours as required)</p> </li> <li> <p>Regular weekday schedule with flexibility based on program requirements</p> </li> <li> <p>Roughly <strong>10% travel</strong></p> </li> <li> <p>Professional office and lab setting with access to prototyping equipment, machine shop tools, and hardware development resources</p> </li> </ul> <hr> <h2>Benefits</h2> <ul> <li> <p>Four weeks of PTO annually</p> </li> <li> <p>Flexible scheduling and hybrid work options</p> </li> <li> <p>Tuition reimbursement</p> </li> <li> <p>Up to 6% 401(k) match</p> </li> <li> <p>Medical, dental, and vision coverage</p> </li> </ul> </div>

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