FPGA/ASIC Design Engineer

Position Title: FPGA/ASIC Engineer Position Description: Protingent Staffing has an exciting contract opportunity located in Northridge, CA. Job Responsibilities: Architecture & Design: Architect and implement high-performance FPGA/ASIC solutions for 10G/100G+ networking applications Lead SoC architecture definition and top-level integration from initial design through synthesis and timing closure Design and implement high-speed data path architectures including encryption/decryption pipelines (AES-256) Develop clock domain crossing (CDC) synchronization designs and packet processing modules Create and maintain comprehensive ASIC/FPGA design specifications Technical Leadership: Lead digital design teams through complete chip execution lifecycle (inception to tape-out) Coordinate with cross-functional teams including DV, analog design, layout, and software teams Provide technical mentorship to junior engineers Drive design reviews for functionality and timing requirement sign-offs Support lab bring-up, debug, and silicon validation activities Implementation & Verification: Design complex digital blocks: packet processing, error correction (FEC, Reed-Solomon, LDPC), encryption cores, packet buffers, memory interfaces to external DDR/LPDDR4 Implement IEEE 802.3 compliant designs (10G-KR, 10GiE, GiE PCS cores) Develop synthesis constraints and achieve timing closure for complex designs Implement DFT methodology and ATPG for production testing Conduct FPGA emulation and validation using Xilinx platforms. Job Qualifications: B.S. in Electrical Engineering or Computer Engineering. 10+ years of ASIC/FPGA design experience. 5+ years leading design teams or chip-level projects. Proven track record of successful tape-outs and silicon bring-up (ASIC/FPGA). Expert-level proficiency in Verilog/SystemVerilog RTL design. Strong experience with Xilinx FPGA platforms (Versal, Kintex, Virtex series). Deep understanding of high-speed networking protocols (Ethernet, PCI-Express, USB) Expertise in synthesis, static timing analysis, and timing closure (Synopsys/Cadence tools). Experience with forward error correction algorithms and encryption standards (AES, DES). Proficiency with scripting languages (Python, Perl) for design automation. Hands-on experience with FPGA tools: Vivado, Vitis, Chipscope, ILA. Preferred Job Qualifications: Mixed-signal design and verification experience (cocotb, UVM). Experience with analog interfaces and power management designs. Knowledge of USB Type-C, USB PD, and power delivery protocols. Familiarity with formal verification methodologies. Patent portfolio in digital design or error correction. Experience with satellite communication systems or aerospace applications. Job Details: Job Type: Contract Location: Northridge, CA. Pay Rate Range: $75-100/hr. Due to government contract requirements, this position is restricted to U.S. Citizens only Benefits Package: Protingent offers competitive salaries, insurance plan options (HDHP plan or POS plan), education/certification reimbursement, pre-tax commuter benefits, Paid Time Off (PTO), and an administered 401k plan. About Protingent: Protingent is an Award-Winning provider of top-tier Engineering and IT talent, trusted by companies at the forefront of innovation — from Software and Aerospace to AI, Clean Tech, Medical Devices, and Connected Technologies. We’re passionate about making a positive impact by connecting exceptional talent with meaningful opportunities and helping our clients build the future.