About the Role
<p><strong>Job Responsibilities: </strong></p>
<p>Protocol Stack Design and Maintenance </p>
<p>Design and maintain the NVMe protocol stack, including Admin and I/O command processing, and Submission/Completion Queue management. </p>
<p>Ensure full compliance with the latest NVMe specifications and PCIe Gen5 protocol requirements. </p>
<p>Design and implement SMBus and I3C communication protocols, ensuring reliable and accurate data exchange with the host controller. </p>
<p>Command Processing and Flow Control </p>
<p>Implement NVMe command parsing, data transfer mechanisms, and completion flows, supporting multi-namespace operations. </p>
<p>Implement SMBus/I3C read/write commands and data flow, including status monitoring, temperature/voltage reporting, and control command handling. Error Reporting and Recovery </p>
<p>Implement proper status code reporting, Asynchronous Event Notification (AEN), and error recovery flows to ensure host compatibility. </p>
<p>Handle timeout, abort, and reset scenarios to maintain system stability and minimize host impact. </p>
<p>Design SMBus/I3C error detection and retry mechanisms to prevent transmission errors from causing system failures. </p>
<p><strong>Compliance and Interoperability :</strong></p>
<p>Verify compatibility with industry-standard NVMe compliance tools and host platforms. Validate SMBus and I3C communication against JEDEC/MIPI specifications to ensure broad interoperability with different host systems and controllers. </p>
<p><strong>Debug and Validation :</strong></p>
<p>Capture and analyze PCIe/NVMe transactions using protocol analyzers, logic analyzers, and firmware logs. </p>
<p>Monitor SMBus/I3C transfers, analyze timing and error conditions, and ensure firmware implementation is stable and reliable. </p>
<p>Collaborate with validation teams to execute compliance, stress, and corner-case tests, including hot-plug, power management, error injection, and multi-protocol concurrency tests. </p>
<p>Provide root-cause analysis and implement fixes for protocol-related issues found during validation or in customer systems. </p>
<p><strong>Minimum Requirements:</strong></p>
<p>Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related fields. </p>
<p>At least 3 years work experience in each of the following: </p>
<p>Software/firmware applications engineering </p>
<p>Experience in SSD controller/firmware architecture </p>
<p>Strong experience in C/C++ programming and data structure </p>
<p>Hands on experience with JTAG/ICE debuggers </p>
<p>Experience with version control software like Git. </p>
<p>Competent to work independently as well as in a small team collaboration </p>
<p>environment. </p>
<p>Must be willing to learn fast and execute as a team player. </p>
<p>Good oral, written and presentation skills for communication and documentation. Ability to work independently with a minimum of day-to-day supervision. </p>
<p><strong>Preferred Qualifications: </strong></p>
<p>The ability to operate logic analyzer, oscilloscope and bus protocol analyzer is valuable. Familiar with SATA/PCIe (NVMe) protocols </p>
<p>Familiar with NAND flash protocols </p>
<p>Linux system debug experience. </p>
<p>Fluent in reading and writing Mandarin preferred. </p>
<p>Annual merit increases </p>
<p><strong>Benefits: </strong></p>
<p>Year-end bonus </p>
<p>RSU for eligible employees </p>
<p>Invention and Patent Awards </p>
<p>401(k) Employer Matching </p>
<p>Length of Service Awards </p>
<p>We offer comprehensive health insurance plans for eligible employees and dependents. There are plans to meet the needs of you and your family.</p>
<br />
Security Clearance Required: No<br />
Visa Candidate Considered: No<br />
<strong>Compensation:</strong><br />
Base Salary - USD $150,000 to $210,000