Analog Designer

Analog DesignerLocation: Austin, TX

Posted On: 06/30/2026

Requirement Code: 73888

Requirement Detail

THE PERSON:
You have strong circuit/electrical/ESD background. You are a team player who has excellent communication skills and experience collaborating with other engineers. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
• Provide guidance and review of a wide array of digital and analog GPIO implementations based on 3rd party IP licensed by AMD.
• Perform and support electrical analyses for power and signal integrity to ensure that GPIOs operate successfully across many AMD SoC environments.
• Review and sign off on physical verification checks for GPIO.
• Develop AI-assisted methodology to help streamline GPIO integration efforts across many implementations and many SoC.
PREFERRED EXPERIENCE:
• Circuit and logic design engineering experience
• ESD knowledge and experience
• Experience with SPICE
• Understanding power noise generation and sensitivity
• Understanding of the basics of signal integrity, specifically termination impedance, characteristic impedance, transmission lines
• Experience using AI tool(s) in engineering practice.
• Knowledge of clock distribution and clock specifications like jitter, DCD, etc. a plus.?€?
ACADEMIC CREDENTIALS:
• Bachelors or Masters degree in Electrical or Computer Engineering

You have strong circuit/electrical/ESD background. You are a team player who has excellent communication skills and experience collaborating with other engineers. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

• Provide guidance and review of a wide array of digital and analog GPIO implementations based on 3rd party IP licensed by AMD.

• Perform and support electrical analyses for power and signal integrity to ensure that GPIOs operate successfully across many AMD SoC environments.

• Review and sign off on physical verification checks for GPIO.

• Develop AI-assisted methodology to help streamline GPIO integration efforts across many implementations and many SoC.

PREFERRED EXPERIENCE:

• Circuit and logic design engineering experience

• ESD knowledge and experience

• Experience with SPICE

• Understanding power noise generation and sensitivity

• Understanding of the basics of signal integrity, specifically termination impedance, characteristic impedance, transmission lines

• Experience using AI tool(s) in engineering practice.

• Knowledge of clock distribution and clock specifications like jitter, DCD, etc. a plus.?€?

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in Electrical or Computer Engineering